About me

👋 I am Kyoungjoon (Dale) Ha, an RTL designer for high-speed SerDes interconnect PHYs, including UCIe and MIPI D-PHY/C-PHY, at Samsung Electronics. Before joining Samsung, I conducted a mixed-signal circuit research 🔬 on transistor-level PLLs, including ADPLL and ILPLL. I am fluent across the analog/digital boundary, from transistor-level circuits to RTL ⚡.

📄 For a more detailed record of my work, please find my CV.

💼 Work Experience

Samsung Electronics — Circuit Design Engineer

Aug. 2023 - Present · Hwaseong, South Korea
🚀 Designed advanced interconnect PHYs, including UCIe and MIPI D-PHY/C-PHY.

Seoul National University — Graduate Researcher

Aug. 2021 - Aug. 2023 · Seoul, South Korea
🧪 Conducted research focused on PLLs and clock-generation circuits, from transistor-level design to measurement.
🎓 Advised by Prof. Deog-Kyoon Jeong.

🎓 Education

Seoul National University
Sep. 2021 - Aug. 2023
M.S. in Electrical and Computer Engineering,

Sungkyunkwan University
Mar. 2015 - Aug. 2021
B.S. in Electronic and Electrical Engineering,
GPA: 4.28 / 4.5, Summa Cum Laude

🏆 Honors & Awards

• Rising Star Award, Samsung Electronics, 2025
  Awarded to top early-career performers.
• Summa Cum Laude, Sungkyunkwan University, 2021
• Dean’s List, Sungkyunkwan University, 2020
• National Science & Engineering Scholarship, KOSAF, 2017

🛠️ Skills

Technical areas ⚙️
PHY design, phase-locked loops, mixed-signal integration, SerDes, RTL design

Languages 💻
SystemVerilog, UVM, C++, Python, Tcl, MATLAB

Tools 🔧
Xcelium, Virtuoso, SPICE, PrimeTime, Design Compiler, Git